Novel Architecture of 4-bit Arithmetic Logic Unit (ALU) UsingFull Swing GD Itechnique

Abstract

This study offers a design of a 4-bit arithmetic logic unit (ALU) by taking vantage of the
concept of gate diffusion input (GDI) technique. ALU is the most significant and fundamental component
of central processing unit as well as of numbers of embedded system and microprocessors. In this, ALU
consists of 4x1 multiplexer, 2x1 multiplexer and low power full adder designed to implements logic
operations. Full swing GDI cells are employed in the design of multiplexers and full adder which are then
associated to realize ALU. The simulation is carried out DSCH3.5 and Microwind3.5 simulator utilizing
65nm technologies and compared with earlier designs realized with Pass transistor logic and CMOS
logic.