Design and analysis of high-performance CMOS5-2com pressor with 58 transistors

Abstract

Compressors are the building blocks of CMOS multipliers' partial product reduction stage.
The CMOS 5-2 compressor is given a new design with 58 transistors, the lowest device count ever
reported for such a circuit. MICROWIND 3.5 is used to run 65nm Verilog simulations on 65nm
technology. The circuits were first built using the DSCH 3.5 Tool and the Verilog file was generated. The
suggested 5-2 compressor has much better power delay performance than previously proposed
techniques, according to simulation findings.